SEALSQ subsidiary IC’Alps advances QASIC quantum-resistant ASIC roadmap toward 2026 prototype

• SEALSQ’s French ASIC design subsidiary IC’Alps advanced its QASIC program to embed post-quantum security into customer-owned chips.
• Roadmap targets first QASIC prototype in 2026, aiming to prove quantum-resistant security integration without sacrificing safety, performance, power, reliability.
• Initial commercial focus centers on cybersecurity, medical devices, automotive systems, where long-lived hardware faces rising quantum-computing risk.
• IC’Alps adds custom-chip design capabilities, including RISC-V SoC infrastructure, mixed-signal design, functional safety, certified production, lifecycle management.

Disclaimer: This news brief was created by Public Technologies (PUBT) using generative artificial intelligence. While PUBT strives to provide accurate and timely information, this AI-generated content is for informational purposes only and should not be interpreted as financial, investment, or legal advice. SEALSQ Corp. published the original content used to generate this news brief via GlobeNewswire (Ref. ID: 202608260830PRIMZONEFULLFEED9816229) on August 26, 2026, and is solely responsible for the information contained therein.