Behind Qualcomm's collaboration with Jiang Bolong (09976): AI first hit the wall, not computing power, but storage
The Zhitong Finance App learned that during the 2026 Snapdragon Summit held recently, Qualcomm announced a four-party cooperation with Step Yue, Wulianghuo, and Jiang Bolong (09976) to deeply adapt and reason the Steppedge-Omni 30B-MoE (hybrid expert) model to the end side based on the sixth-generation Snapdragon 8 Super Extreme mobile platform, further accelerate the smart AI experience to more terminals and consumers.
In this cooperation list, a memory manufacturer appeared, which itself explains one thing: if the big model actually sinks into the phone, PC, and robot, the first answer is not whether the chip is fast enough, but whether the memory can be installed, whether it can be fed or not moved.
From the Snapdragon summit to the group price adjustments of terminal manufacturers in the second half of the year, they pointed to the same thing: when the big model sank from the cloud to the terminal, the first wall it hit was not computing power, but storage.
From “insufficient capacity” to “insufficient bandwidth”: AI pushes the storage wall into everyone's pocket
In the second half of this year, the pressure to increase storage prices began to be transmitted to consumers in the most straightforward way. At the beginning of September, Xiaomi, Huawei, and Honor successively raised the prices of various models on sale, covering flagship, mid-range, and even some entry-level products. The overall increase was between 200 yuan and 1,000 yuan. Behind the collective price adjustments of terminal manufacturers is the systematic scarcity of upstream storage resources.
The reason for this round of scarcity is not how strong demand for consumer electronics is; the real variable is AI. According to data from Jibang Consulting, HBM and RDIMM are expected to account for 51% of the DRAM supply in 2026. The original manufacturer is continuing to tilt limited advanced production capacity towards high value-added products such as HBM and server memory, and the supply elasticity of general-purpose DRAM and NAND is structurally compressed. The average global DRAM and NAND prices reached another record high in August. The agency has raised the expected increase in PC DRAM contract prices in the third quarter to 18%-23% month-on-month.
In addition to the price, there is another hurdle that doesn't necessarily have to be overcome by adding money — physical capacity. If you run a large model with 7B parameters, just loading the weight into the memory takes up more than 14GB, while mainstream phones can only allocate 1-2 GB to a single application. Huabang Electronics also pointed out at a recent industry conference that end-side AI imposes “triangular constraints” on storage with capacity, bandwidth, and power consumption as the core. The three are mutually constrained, and traditional storage solutions are already clearly struggling in edge reasoning scenarios. In other words, terminal manufacturers are no longer faced with the question of “whether you want to spend more money”, but rather the physical upper limit of “spending more money, you may not be able to fit it”.
In other words, the biggest gap left by the expansion of AI computing power is already shifting from “counting fast or not” to “not being able to send data.” And this is Jiang Bolong's home stadium.
No heaps of memory, change the architecture: let 4GB run the 8GB experience
Facing the memory wall, the mainstream idea in the industry is to increase capacity and increase bandwidth. The cost is a simultaneous rise in BOM costs and power consumption. Jiang Bolong's solution is different — it's not about installing more memory on the terminal, but making the existing memory “enough”.
The SPU (storage processing unit) chip launched by the company integrates a storage control engine and an intelligent processing engine, and combines a self-developed iSA storage intelligence architecture to establish a closed loop of “chip hardware+intelligent scheduling” end-to-end AI storage software and hardware collaboration technology. After joint tuning with AMD, on AI mobile workstations and AI PC platforms, the endside AI model carrying scale increased by about 3.2 times, memory utilization efficiency increased by about 200%, and terminal DRAM usage decreased by about 40%. At the level of experience, after 4GB DDR is equipped with this intelligent hardware and software architecture, the terminal response time is close to the normal configuration level of 6GB/8GB DDR.
At a time when memory is doubling in a year and the collective price of mobile phones is rising, the industrial meaning of this set of numbers is extremely direct: installing 2-4 GB less memory can still have the same experience, which means that terminal manufacturers can use lower BOM costs to hedge against upstream price increases. As a result, technical advantages are directly transformed into bargaining power.
At present, Jiang Bolong's product matrix for multiple terminals has also been formed. AIDIMM supports up to 128GB capacity, 256 bit width, 307.2Gb/s bandwidth, supports 0.9V-1.05V dynamic voltage regulation, and is equipped with an FDVFS intelligent energy efficiency optimization mechanism, which can intelligently adjust voltage and operating states for different load scenarios such as end-side AI inference and large model operation; AILPBGA uses a single native 256-bit bit-width design, with a bandwidth of up to 307Gb/s, and a capacity coverage of 24GB-64GB, fully adapts to the LPDDR standard interface without reconfiguration or system architecture; AI/SoCAR oriented The ePOP5x smart glasses and smartwatches have the thinnest package thickness of only 0.52 mm, and the DRAM transmission rate is as high as 8533MB/s. Underlying support is large-scale mass production of self-developed 5nm advanced UFS 4.1 master control chips — the company's self-designed master control chips have exceeded 280 million units, and SPU chips using the same advanced process, NAND I/O can reach 4,800 MT/s, and support the maximum capacity of a 128TB SSD single disk.
On the basis of this product matrix, Jiang Bolong further expanded the iSA architecture platform ecosystem. Recently, the company took the lead in adapting the industry-unique iSA storage smart device to the sixth-generation Snapdragon 8 Super Extreme mobile platform. It is powered by the self-developed ISA storage agent and Huiyi Microcontroller UFS 4.1 memory chip software and hardware to achieve efficient loading of model weight from flash memory from the end side, greatly reducing the operating memory consumption of large models through storage and calculation collaboration, and significantly improving model loading and operation efficiency. In the future, Jiang Bolong will continue to deepen ecological collaboration with Qualcomm to jointly create high-performance end-side AI solutions to bring more stable and reliable local AI experiences to end users.
High-end takeover: Structural changes behind 59% gross margin
Ultimately, the value of structural capabilities must be verified in terms of revenue structure. In the first half of 2026, the company achieved operating income of 24.088 billion yuan, an increase of 136.26%; net profit to mother of 10.577 billion yuan, an increase of 71528.66%; gross margin of storage products reached 59.08%, an increase of 45.80 percentage points over the previous year, a comprehensive gross profit margin of 58.90%, and a net profit margin of 44.49%.
What is more noteworthy is the speed at which high-margin businesses take over. Enterprise-grade storage revenue of 2.140 billion yuan in the first half of the year, an increase of 208.80% over the previous year. The company has become one of the few domestic enterprises with the ability to design, combine and scale supply “ESSD+RDIMM” products. The products were introduced into the supply chains of some leading Internet companies and server manufacturers, and completed compatibility adaptation with various domestic CPU platforms such as Kunpeng, Haiguang, and Feiteng. DDR5 RDIMM passed the AMD Threadripper PRO 9000WX series workstation certification. At the same time, it illuminated SOCAMCM, combined with MRDIMM, The CXL 2.0 memory expansion module builds a complete enterprise product matrix. The automotive-grade UFS 4.1 is equipped with a self-developed 5nm master control, and the sequential reading speed is as high as 4,200MB/s. It has entered the verification stage for leading car manufacturers and has begun direct supply to North American smart cars and autonomous driving technology giants. The company has established cooperation with more than 20 OEMs and more than 50 Tier 1 suppliers. MSSD relies on SiP system-level packaging technology at the Suzhou sealing and testing base to achieve large-scale mass production. The monthly production capacity exceeds one million levels, and can be flexibly adapted to scenarios such as PC laptops, gaming consoles, drones, and VR devices.
The global layout was realized simultaneously: Zilia achieved foreign sales revenue of 3,950 billion yuan, an increase of 184.58%; Lexar (Lexar) achieved global sales revenue of 3,966 billion yuan, an increase of 84.90%; and overseas revenue of 17.017 billion yuan, an increase of 142.27% year on year. With the completion of the acquisition of the remaining 19% of Zilia's shares in March 2026, the company has built a global manufacturing network covering Zhongshan, Suzhou, Manaus and Atibaia in Brazil, and the three major brands FORESEE, Zilia, and Lexar (Lexar) have co-formed.
It is worth mentioning that the current Hong Kong stock fund raising will also be mainly used to enhance independent R&D and innovation capabilities in chip design and advanced storage product development, focusing specifically on the three major directions of AI high-end memory research and development, main control chips, and high-end packaging and testing.
When memory became the most scarce resource in the AI era, the core of industry competition also migrated: whoever can run more intelligent with less memory has mastered the ability to define the next generation of terminals. Today, Jiang Bolong relies on the “A+H” dual platform to target long-term card slots under this trend — gradually building the underlying ability to adapt to the AI needs of the end side around the synergy between storage and computing power. Steady progress can we have an opportunity to grow from a part of the supply chain to a key technology player in the evolution of next-generation terminals.